Abstrait

Design of a Programmable Low Drop-Out Regulator using CMOS Technology

Anjali V. Nimkar, Shirish V. Pattalwar, Preeti R. Lawhale

Low drop-out regulators (LDO) are circuits which are designed to provide a stable and specified DC voltage, with a low input-to-output voltage difference. To get a new approach of power management towards a design of a low drop-out voltage regulator that provides a modern system on chip (SoC) solution and fulfils the present commercial requirements as well as the upcoming demands of the future, it becomes necessary to design the LDO regulator which gives all-rounder performance. This LDO should beware of various performance matrices. Also future nm technology offers more advantages in achieving most of the performance specifications. This paper presents a lowvoltage low-dropout regulator that is capable of providing regulated output with small drop-out voltage and offers a range of different voltages, by using two binary-input control signals. The entire circuit has been designed in a 32 nm technology and simulated using Microwind tool. This design utilizes a cascode current amplifier used with a high threshold PMOS operated in the sub-threshold region, which is responsible to boost the gain and yield the desired output voltage.