M.Monica dhana ranjini, P.Gnana skanda parthipan,G . Prabhakar
In the arrival of today’s highly integrated multimedia device and fast emerging applications, image processing have become more important than any others. These devices require complex image processing tasks lead to a very challenge design process as it demands more efficient and high processing systems. The scope of the project is to extract locations and features of multi objects in an image for object recognition. For low power consumption and better performance we design a proposed system in FPGA. In existing system an cell based multi object feature extraction algorithm is used to extract simultaneously autocorrelation feature of objects. It is calculated using zeroth order and first order moments to obtain the size and location of multiple objects. To reduce computational complexity and memory consumption, Local Binary Pattern (LBP) and Local Ternary Pattern (LTP) is used to extract the feature of multiple objects are proposed. In the local binary pattern, the LBP value is computed by comparing a gray level value of centre pixel in an image with its neighbors. The local ternary pattern is extended from LBP to threevalued code in which gray values are quantized to zero,+1,-1. The proposed architecture is designed using verilog HDL, simulated using Modelsim software and synthesized using Xilinx project navigator.