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Power Efficient Design of Bilbo By Using Various Clocked Latches

S.Meena, P.Nagarajan

This paper enumerates low power design of BILBO(Built-In-Logic-Block-Observer)usingBasic 5T-TSPC clocked latch and 5T-TSPC(MTCMOS) clocked latch.The clocked latches are basic building block to design the BILBO.The clocked latches consumes more power in the total power consumption of the BILBO.The power efficient 5TTSPC( MTCMOS) clocked latch is designed from the Basic 5TTSPC clocked latch.The BILBO is designed by using both Basic 5T-TSPC clocked latch and 5T-TSPC (MTCMOS) clocked latch.The design of BILBO by using 5TTSPC( MTCMOS) consumes less power.The performance o f BILBO i s an alyz ed in terms o f Numbe r Of Transistors(NT),NumberOfClockedTransistors(NC), Power(P),Area(A).

Avertissement: Ce résumé a été traduit à l'aide d'outils d'intelligence artificielle et n'a pas encore été examiné ni vérifié

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