Abstrait

STATIC SYNCHRONOUS SERIES COMPENSATOR FOR SERIES COMPENSATION OF EHV TRANSMISSION LINE

P.Suman Pramod Kumar , N.Vijaysimha, C.B.Saravanan

This paper presents the schematic and basic controls of a reconfigurable FACTS system that can be used to realize the major voltage source converter FACTS topologies: STATCOM, SSSC and UPFC. Furthermore, the state models and control algorithms for the FACTS devices are proposed. A Digital Signal Processor (DSP) is used to implement the control system for these devices. The comparison of the experimental and simulation results is also provided to verify the proposed controls and also it describes an active approach to series line compensation, in which a synchronous voltage source, implemented by a gate turn-off(GTO) based voltage sourced inverter, is used to provide controllable series compensation. This compensator, called static synchronous series compensator(SSSC),can provide controllable compensating voltage over an identical capacitive and inductive range, independently of the magnatude of the line current. It is immune to classical network resonances. In addition to series reactive compensation, with an external DC power supply it can also compensate the voltage drop across the resistive component of the line impedence. The compensation of the real part of the impedence can maintain high X/R ratio even if the line has a very high degree of series compensation. Concurrent and coordinated modulation of reactive and real compensation can greatly increase power oscillation damping. The paper discusses the basic operating and performance characteristics of the SSSC, and compares them to those characterizing and more conventional compensators based on thyristor-switched or controlled series capacitors. It also presents some of the results of TNA simulations carried out with an SSSC hardware model. presented an in-depth investigation of the dynamic performance of STATCOM and SSSC theoretically and by exact digital simulation. A 24- pulse GTO based converter model is designed to represent the operation of the STATCOM and SSSC within a power transmission system. It is shown that the Phase-Locked Loop (PLL) inherent delay has a great effect on the dynamic operation of the SSSC and a new auxiliary regulator is proposed to enhance the dynamic performance of the SSSC. The proposed control schemes are validated by digital simulation.